Welcome to AISys Lab!

Accelerated Intelligent Systems Lab (AISys) is affiliated with ECE, Seoul National University. We conduct research on system and architectural issues for accelerating various applications such as deep learning, compression algorithms and graph processing.

Hiring

AISys Lab is currently looking for talented students (graduate students, undergraduate interns).
Please contact leejinho at snu dot ac dot kr if you are interested.

석박사 신입생 및 학부생 인턴을 상시 선발하고 있습니다. 관심있는 학생은 leejinho at snu dot ac dot kr 로 연락 바랍니다.

News

Feb. 2023: We got a paper accepted in DAC 2023: Fast Adversarial Training with Dynamic Batch-level Attack Control congratulations to authors!

Jan. 2023: We welcome Jungwook Hong as our new member Ü

Jan. 2023: We got a new year's first paper accepted to SIGMOD 2023: Design and Analysis of a Processing-in-DIMM Join Algorithm: A Case Study with UPMEM DIMMs congratulations to authors!

Nov. 2022: We got a paper accepted in DATE 2023: Pipe-BD: Pipelined Parallel Blockwise Distillation congratulations to authors, see you at Antwerp!

Oct. 2022: Our paper titled SGCN: Exploiting Compressed-Sparse Features in Deep Graph Convolutional Network Accelerators has been accepted to HPCA 2023. Nice job!

Oct. 2022: Best paper award received from PACT 2022! Congratulations and thanks to the authors of "Slice-and-Forge"

Sep. 2022: Optimus-CC: Efficient Large NLP Model Training with 3D Parallelism Aware Communication Compression has been accepted to ASPLOS 2023. Congratulations authors!

Aug. 2022: two papers have been accepted to PACT 2022. Nice work!

  • Slice-and-Forge: Making Better Use of Caches for Graph Convolutional Network Accelerators
  • Decoupling Schedule, Topology Layout, and Algorithm to Easily Enlarge the Tuning Space of GPU Graph Processing

    • Mar. 2022: Our CVPR 2022 paper 'AIT' has been selected for an oral presentation (342/8161 = 4.2%). Double congratulations!

    Mar. 2022: Jinho Lee received Yonsei Best Teaching Award for 2021.

    Mar. 2022: Our paper titled GCoM: A Detailed GPU Core Model for Accurate Analytical Modeling of Modern GPUs has been accepted to ISCA 2022. See you in New York Ü

    Mar. 2022: Our paper It's All In the Teacher: Zero-shot Quantization Brought Closer to the Teacher has been accepted at CVPR 2022. Congratulations!

    Feb. 2022: We have two newly accepted papers on Valentine's day. Congratulations authors Ü

  • Enabling Hard Constraints in Differentiable Neural Network and Accelerator Co-Exploration @ DAC 2022
  • GuardiaNN: Fast and Secure Inference in TrustZone Using Embedded SRAM and Cryptographic Hardware @ Middleware 2022

    • Feb. 2022: Kanghyun Choi, Deokki Hong, and Hye Yoon Lee won a silver prize in 28th Samsung Humantech Paper Awards.

    Jan. 2022: Our paper SALoBa: Maximizing Data Locality and Workload Balance for Fast Sequence Alignment on GPUs has been accepted at IPDPS 2022. Hope we get to travel to France :)It's going virtual.

    Jan. 2022: SeongYeon Park joins the Lab. Welcome!

    Oct. 2021: Jaewon Jung joins the Lab. Welcome!

    Sep. 2021: SeongYeon Park became the first place winner for ACM Student Research Competition (SRC) at PACT 2021. Nice work!

    Sep. 2021: Our paper Qimera: Data-free Quantization with Synthetic Boundary Supporting Samples has been accepted at NeurIPS 2021. Congratulations!

    Jul. 2021: Jaeyong Song and Hyeyoon Lee join the Lab. Welcome on board!

    May. 2021: Our paper Making a Better Use of Caches for GCN Accelerators with Feature Slicing and Automatic Tile Morphing has been accepted at IEEE CAL. Congratulations!

    May. 2021: Our paper AutoReCon: Neural Architecture Search-based Reconstruction for Data-free Compression has been accepted at IJCAI 2021.

    Mar. 2021: Jinho Lee received Yonsei Best Teaching Award for 2020.

    Feb. 2021: We have two papers accepted to DAC 2021. Congratulations authors!

  • DANCE: Differentiable Accelerator/Network Co-Exploration
  • Dataflow Mirroring: Architectural Support for Highly Efficient Fine-Grained Spatial Multitasking on Systolic-Array NPUs

    • Feb. 2021: Mingi Yoo joins the Lab. Welcome!

    Oct. 2020: Our paper GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent has been accepted at HPCA 2021

    Jul. 2020: Deokki Hong and Kanghyun Choi join the Lab. Welcome!

    Jul. 2020: Our paper FlexReduce: Flexible All-reduce for Distributed Deep Learning on Asymmetric Network Topology is published at DAC 2020

    Feb. 2019: Hohyun Kim joins the Lab. Welcome!

    Oct. 2019: Our paper In-memory database acceleration on FPGAs: a survey is published at VLDB Journal

    Sep. 2019: Jinho Lee joined CS, Yonsei University as an assistant professor.

    Aug. 2019: Our paper Accelerating conversational agents built with off-the-shelf modularized services is published at IEEE Pervasive Computing

    June 2019: Our demo has been selected as the Best Demo Award at ACM MobiSys 2019

    Research Topics


    We conduct research on system and architectural issues for accelerating various applications such as deep learning, compression algorithms and graph processing, especially on FPGAs and GPUs. Some of the on-going research topics are listed below. However, you're free to bring your own exciting topic.

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    AI Accelerators


    With no doubt the most popular accelerator for AI nowadays is GPU. However the world is heading towards the next step: AI-specific accelerators. There is much room to improve in terms of accelerator designs. For example, optimizing dataflow, utilizing sparse network structure, or processing-in-memory techniques.

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    Neural Architecture Search


    Designing a neural architecture, especially in relation with specialized accelerators (i.e. NPUs) is a difficult and time-consuming task. Neural architecture search aims to solve this problem in a way that everyone had in mind: designing DNNs using DNNs.

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    Distributed Deep Learning


    To utilize multiple devices (i.e., GPUs) for high-speed DNN training, it's common to employ distributed learning. There are still many ways to improve current distributed learning methods: Devising a new communication algorithm, smartly pipelining the jobs, or changing the ways that devices synchronize.

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    Data-free, Privacy-aware Neural Network Compression


    Multiple model compression techniques have been suggested these days to reduce the computation burden from the nature of DNNs. Most of them utilize original training data to compensate for accuracy losses. Otherwise, they may end up with significant accuracy degradation. However, the original training data is usually inaccessible due to privacy or copyright issues. To this end, our research focuses on compressing neural networks while maintaining comparable performance, even without the original dataset.